| Foiled by Intel's rigid patents on Slot 1, rival vendors
of x86 chips are working on a new CPU interface to succeed
the widely used Socket 7. The higher-bandwidth interface
would be an open alternative to Intel's proprietary
sockets and slots, but it could split the PC system
architecture into incompatible standards. Cyrix officials confirm they've held discussions with AMD and other companies about a successor to Socket 7. Socket 7 is the 296-pin CPU socket used by all P5-class x86 chips, including Intel's Pentium processors, the AMD K5 and K6, the Cyrix 6x86 and 6x86MX, and the Centaur IDT-C6. Intel's competitors need an alternative because they can't license the patented bus protocols for Intel's P6-class processors. All of Intel's P6 processors (including the Pentium Pro, the Pentium II, and the forthcoming Deschutes) require the same basic bus protocols, although the physical interfaces vary. The Pentium Pro uses Socket 8, the Pentium II uses Slot 1, and some future Pentium II processors will use Slot 2. Mobile versions of the Pentium II use still another proprietary interface that's a miniaturized variation on Slot 1. Motherboard makers can put Intel's CPU interfaces on their boards, but Intel won't share the technology with rival vendors of x86 processors, although it has licensed it to some core-logic chip-set vendors. "If we adopt a proprietary solution, it will only help Intel win," says Stan Swearingen, product management director at Cyrix. "We believe the industry wants that to be an open socket. We're already talking to chip-set vendors, AMD, and other companies to define a new interface," he adds. The interface would probably debut in 1999. Cyrix, AMD, and Centaur agree that Socket 7 will remain popular at least through 1998, and possibly beyond. Although it has less bandwidth than Intel's interfaces, it's fast enough for mainstream desktops and servers. Vendors are currently working to extend the life of Socket 7 in several ways. This fall, AMD will likely announce a new K6 processor with a larger Level 1 (L1) cache. Centaur plans to ship next year a new version of the IDT-C6 that will integrate the Level 2 (L2) cache. Other possible stopgaps include CPU daughtercards that plug into Socket 7 (see the feature article "Socket to Me"). Meanwhile, Intel isn't standing still. In August, it announced a new Pentium Pro processor with 1 MB of L2 cache -- twice the maximum cache size of earlier Pentium Pro chips. Intel plans to introduce the Deschutes version of the Pentium II in mid-1998. Deschutes will be the first Pentium II chip fabricated on a 0.25-micron process, and it will eventually replace today's 0.35-micron Pentium II chips (for more information, see "Future Watch"). Slot 2 is a higher-performance version of Slot 1 that will run at a bus frequency of at least 100 MHz and support larger single-edge contact (SEC) cartridges. These cartridges have room for bigger L2 caches. Intel is aiming Slot 2 at higher-end desktops and servers, leaving Slot 1 for mainstream systems. Even if Intel's competitors can rally around an alternative interface, it will put many companies and users in a quandary. Today it's possible to make a Socket 7 motherboard that works with anybody's P5-class processor. But manufacturers say it costs too much to construct a motherboard with two different CPU interfaces because they're electrically incompatible. Vendors would have to either create two versions of every product or choose sides. The result could be two competing PC architectures: Intel and non-Intel. And since Intel is the industry's leading supplier of CPUs, motherboards, and chip sets, the non-Intel faction faces an uphill battle to establish an open standard. Copyright 1994-1998 BYTE |